hwme_tdme.h

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/*
 *  Copyright (c) 2019, Cascoda Ltd.
 *  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright
 *     notice, this list of conditions and the following disclaimer in the
 *     documentation and/or other materials provided with the distribution.
 *  3. Neither the name of the copyright holder nor the
 *     names of its contributors may be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 *  POSSIBILITY OF SUCH DAMAGE.
 */
#ifndef HWME_TDME_H
#define HWME_TDME_H
 
#include "ca821x_config.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define MAX_HWME_ATTRIBUTE_SIZE 16
#define MAX_TDME_ATTRIBUTE_SIZE 2
 
#define MAX_TXPOWER_CH26 4 
 
enum hwme_status
{
    HWME_SUCCESS   = 0x00, 
    HWME_UNKNOWN   = 0x01, 
    HWME_INVALID   = 0x02, 
    HWME_NO_ACCESS = 0x03, 
};
 
enum hwme_wakeup_condition
{
    HWME_WAKEUP_POWERUP    = 0x00, 
    HWME_WAKEUP_WDT        = 0x01, 
    HWME_WAKEUP_POFF_SLT   = 0x02, 
    HWME_WAKEUP_POFF_GPIO  = 0x03, 
    HWME_WAKEUP_STBY_SLT   = 0x04, 
    HWME_WAKEUP_STBY_GPIO  = 0x05, 
    HWME_WAKEUP_ACTIVE_SLT = 0x06, 
};
 
enum lqi_mode
{
    HWME_LQIMODE_CS = 0x00, 
    HWME_LQIMODE_ED = 0x01, 
};
 
#if CASCODA_CA_VER >= 8212
enum dcdc_level_mode
{
    HWME_DCDCMODE_OFF      = 0x00, 
    HWME_DCDCMODE_TRXONLY  = 0x01, 
    HWME_DCDCMODE_ALWAYSON = 0x02, 
};
 
enum dcdc_frequency_tracking_mode
{
    HWME_FREQ_TRACKING_DISABLED = 0x00, 
    HWME_FREQ_TRACKING_ENABLED  = 0x01, 
};
 
enum dcdc_bod_mode
{
    HWME_BODMODE_OFF      = 0x00, 
    HWME_BODMODE_DCDC     = 0x01, 
    HWME_BODMODE_ALWAYSON = 0x02, 
};
 
enum rcosc_tracking_mode
{
    HWME_RCOSC_TRMD_OFF    = 0x00, 
    HWME_RCOSC_TRMD_GUARD  = 0x01, 
    HWME_RCOSC_TRMD_GUARDR = 0x02, 
    HWME_RCOSC_TRMD_INST   = 0x03, 
};
#endif // CASCODA_CA_VER >= 8212
 
enum hwme_attribute
{
    HWME_POWERCON    = 0x00, 
    HWME_CHIPID      = 0x01, 
    HWME_TXPOWER     = 0x02, 
    HWME_CCAMODE     = 0x03, 
    HWME_EDTHRESHOLD = 0x04, 
    HWME_CSTHRESHOLD = 0x05, 
    HWME_EDVALUE     = 0x06, 
    HWME_CSVALUE     = 0x07, 
    HWME_EDVALLP     = 0x08, 
    HWME_CSVALLP     = 0x09, 
    HWME_FREQOFFS    = 0x0A, 
    HWME_MACTIMER    = 0x0B, 
    HWME_RANDOMNUM   = 0x0C, 
    HWME_TEMPERATURE = 0x0D, 
    HWME_HSKEY       = 0x0E, 
    HWME_SYSCLKOUT   = 0x0F, 
    HWME_LQIMODE     = 0x10, 
    HWME_LQILIMIT    = 0x11, 
#if CASCODA_CA_VER >= 8211
    HWME_RXMODE       = 0x12, 
    HWME_POLLINDMODE  = 0x13, 
    HWME_ENHANCEDFP   = 0x14, 
    HWME_MAXDIRECTS   = 0x15, 
    HWME_MAXINDIRECTS = 0x16, 
#endif                        // CASCODA_CA_VER >= 8211
#if CASCODA_CA_VER >= 8212
    HWME_DCDCMODE             = 0x18, 
    HWME_RCOSCTRMODE          = 0x19, 
    HWME_LOTXCALVALUES        = 0x1A, 
    HWME_LOTXCALOVERWRITEMODE = 0x1B  
#else
    HWME_IMAGINARYINDIRECT = 0x17, 
#endif // CASCODA_CA_VER >= 8212
};
 
enum haes_mode
{
    HAES_MODE_ENCRYPT = 0, 
    HAES_MODE_DECRYPT = 1  
};
 
enum cca_mode
{
    CCAM_EDORCS  = 0, 
    CCAM_ED      = 1, 
    CCAM_CS      = 2, 
    CCAM_EDANDCS = 3  
};
 
enum tdme_hw_err
{
    TDME_ERR_NO_ERROR     = 0x00, 
    TDME_ERR_LO_UNLOCK    = 0x10, 
    TDME_ERR_SPI_INVALID  = 0x20, 
    TDME_ERR_EX_STOF      = 0x30, 
    TDME_ERR_EX_STUF      = 0x40, 
    TDME_ERR_EX_DIVBY0    = 0x50, 
    TDME_ERR_DMA_ACCESS   = 0x60, 
    TDME_ERR_UNEXP_IRQ    = 0x70, 
    TDME_ERR_MALLOC_FAIL  = 0x80, 
    TDME_ERR_SYSTEM_ERROR = 0x90  
};
 
enum tdme_status
{
    TDME_SUCCESS   = 0x00, 
    TDME_UNKNOWN   = 0x01, 
    TDME_INVALID   = 0x02, 
    TDME_NO_ACCESS = 0x03, 
    TDME_LO_ERROR  = 0x04, 
    TDME_FCS_ERROR = 0x05, 
    TDME_SHR_ERROR = 0x06, 
    TDME_PHR_ERROR = 0x07, 
#if CASCODA_CA_VER >= 8212
    TDME_ERR_BOD_DETECT = 0xA0, 
    TDME_ERR_DCDC_ERR   = 0xB0, 
    TDME_ERR_QUEUE      = 0xC0, 
#endif                          // CASCODA_CA_VER >= 8212
};
 
enum tdme_test_mode
{
    TDME_TEST_OFF  = 0x00, 
    TDME_TEST_IDLE = 0x01, 
    TDME_TEST_TX   = 0x02, 
    TDME_TEST_RX   = 0x03, 
    TDME_TEST_ED   = 0x04, 
    TDME_TEST_LO_1 = 0x05, 
    TDME_TEST_LO_2 = 0x06, 
    TDME_TEST_LO_3 = 0x07, 
};
 
/* Tx Packet PHY Payload Data Type */
enum tdme_payload_type
{
    TDME_TXD_RANDOM    = 0x00, 
    TDME_TXD_SEQRANDOM = 0x01, 
    TDME_TXD_COUNT     = 0x02, 
    TDME_TXD_APPENDED  = 0x03, 
};
 
enum tdme_attribute
{
    TDME_CHANNEL     = 0x00, 
    TDME_TX_CONFIG   = 0x01, 
    TDME_ED_CONFIG   = 0x02, 
    TDME_RX_CONFIG   = 0x03, 
    TDME_LO_1_CONFIG = 0x04, 
    TDME_LO_2_CONFIG = 0x05, 
    TDME_ATM_CONFIG  = 0x06, 
#if CASCODA_CA_VER <= 8211
    TDME_MPW2_OVWR = 0x07,
#endif // CASCODA_CA_VER <= 8211
};
 
#ifdef __cplusplus
}
#endif
 
#endif // HWME_TDME_H