Cascoda SDK
Cascoda SDK for building software to run with CA-821x transceivers
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sif_pi4ioe5v6408.h
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1/*
2 * Copyright (c) 2023, Cascoda Ltd.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. Neither the name of the copyright holder nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28/*
29 * Sensor interface for Diodes/Pericom PI4IOE5V6408 8-bit gpio expander
30*/
31
32#ifndef SIF_PI4IOE5V6408_H
33#define SIF_PI4IOE5V6408_H
34
35#ifdef __cplusplus
36extern "C" {
37#endif
38
39#include <stdint.h>
40
41/* i2c address */
42#define SIF_PI4IOE5V6408_I2C_ADDR 0x43
43
44/* interrupt pin */
45#define SIF_PI4IOE5V6408_INT_PIN 31
46
47/* data length, fixed to 1 */
48#define SIF_PI4IOE5V6408_DATALEN 1
49/* I2C register address length */
50#define SIF_PI4IOE5V6408_ADDLEN 1
51
52/* register addresses */
53#define SIF_PI4IOE5V6408_REG_ID_CTRL 0x01 /* device id and control */
54#define SIF_PI4IOE5V6408_REG_IO_DIR 0x03 /* i/o direction */
55#define SIF_PI4IOE5V6408_REG_OUT_STATE 0x05 /* output state */
56#define SIF_PI4IOE5V6408_REG_OUT_HIGHZ 0x07 /* output high impedance */
57#define SIF_PI4IOE5V6408_REG_INP_DEFAULT 0x09 /* input default state */
58#define SIF_PI4IOE5V6408_REG_PUP_ENABLE 0x0B /* pullup / pulldown enable */
59#define SIF_PI4IOE5V6408_REG_PUP_DOWNB 0x0D /* pullup / pulldown select */
60#define SIF_PI4IOE5V6408_REG_INP_STATUS 0x0F /* input status */
61#define SIF_PI4IOE5V6408_REG_IRQ_MASK 0x11 /* interrupt mask */
62#define SIF_PI4IOE5V6408_REG_IRQ_STATUS 0x13 /* interrupt status */
63
64/* timing parameters [ms] */
65#define SIF_PI4IOE5V6408_T_RESET 1 /* startup time after power-up */
66
67/* i/o values / states */
68#define SIF_PI4IOE5V6408_STATE_LO 0 /* low */
69#define SIF_PI4IOE5V6408_STATE_HI 1 /* high */
70
71/* pull-up / pull-down */
72#define SIF_PI4IOE5V6408_PUP_OFF 0 /* no pull-up */
73#define SIF_PI4IOE5V6408_PUP_EN 1 /* pull-up enabled */
74
75/* i/o interrupt on or off (masked) */
76#define SIF_PI4IOE5V6408_IRQ_OFF 0 /* irq off (masked) for specific i/o */
77#define SIF_PI4IOE5V6408_IRQ_ON 1 /* irq on for specific i/o */
78
79/* control / status register bit masks */
80#define SIF_PI4IOE5V6408_CTRL_RESET 0x01 /* software reset */
81#define SIF_PI4IOE5V6408_CTRL_IRQRST 0x02 /* reset interrupt */
82#define SIF_PI4IOE5V6408_ID_FW_REV 0x1C /* firmware revision */
83#define SIF_PI4IOE5V6408_ID_DEV_ID 0xE0 /* device id */
84#define SIF_PI4IOE5V6408_ID_FW_REV_SHR 2 /* shift for firmware revision */
85#define SIF_PI4IOE5V6408_ID_DEV_ID_SHR 5 /* shift for devie id */
86
87/* data acquisition status */
89{
90 SIF_PI4IOE5V6408_ST_OK = 0, /* read values ok */
91 SIF_PI4IOE5V6408_ST_FAIL = 1, /* acquisition failed */
92 SIF_PI4IOE5V6408_ST_UNAVAILABLE = 2 /* unavailable / not connected */
93};
94
95/* Functions */
96
103
109uint8_t SIF_PI4IOE5V6408_Initialise(void);
110
118uint8_t SIF_PI4IOE5V6408_ReadDeviceId(uint8_t *chip_id, uint8_t *rev_id);
119
127uint8_t SIF_PI4IOE5V6408_SenseInput(uint8_t io, uint8_t *val);
128
136uint8_t SIF_PI4IOE5V6408_SenseOutput(uint8_t io, uint8_t *val);
137
144uint8_t SIF_PI4IOE5V6408_SenseAllInputs(uint8_t *port);
145
153uint8_t SIF_PI4IOE5V6408_SetOutput(uint8_t io, uint8_t val);
154
163uint8_t SIF_PI4IOE5V6408_ConfigureInput(uint8_t io, uint8_t irq_on, uint8_t pullup_on);
164
171uint8_t SIF_PI4IOE5V6408_ConfigureOutput(uint8_t io);
172
173#endif // SIF_PI4IOE5V6408_H
bool SIF_PI4IOE5V6408_IsInterruptActive(void)
Device initialisation.
Definition sif_pi4ioe5v6408.c:55
uint8_t SIF_PI4IOE5V6408_ConfigureOutput(uint8_t io)
configure output
Definition sif_pi4ioe5v6408.c:369
uint8_t SIF_PI4IOE5V6408_SenseInput(uint8_t io, uint8_t *val)
sense specific input
Definition sif_pi4ioe5v6408.c:264
uint8_t SIF_PI4IOE5V6408_Initialise(void)
Device initialisation.
Definition sif_pi4ioe5v6408.c:217
uint8_t SIF_PI4IOE5V6408_ReadDeviceId(uint8_t *chip_id, uint8_t *rev_id)
Read chip id and revision id.
Definition sif_pi4ioe5v6408.c:248
pi4ioe5v6408_status
Definition sif_pi4ioe5v6408.h:89
@ SIF_PI4IOE5V6408_ST_OK
Definition sif_pi4ioe5v6408.h:90
@ SIF_PI4IOE5V6408_ST_UNAVAILABLE
Definition sif_pi4ioe5v6408.h:92
@ SIF_PI4IOE5V6408_ST_FAIL
Definition sif_pi4ioe5v6408.h:91
uint8_t SIF_PI4IOE5V6408_ConfigureInput(uint8_t io, uint8_t irq_on, uint8_t pullup_on)
configure input
Definition sif_pi4ioe5v6408.c:337
uint8_t SIF_PI4IOE5V6408_SetOutput(uint8_t io, uint8_t val)
set specific output
Definition sif_pi4ioe5v6408.c:319
uint8_t SIF_PI4IOE5V6408_SenseAllInputs(uint8_t *port)
sense all inputs (0-7) for port
Definition sif_pi4ioe5v6408.c:304
uint8_t SIF_PI4IOE5V6408_SenseOutput(uint8_t io, uint8_t *val)
sense specific output
Definition sif_pi4ioe5v6408.c:286